This project focuses on the development and validation of a novel algorithm to compress neural data. The student will involve in algorithm and hardware development and testing.
Wireless neural interfaces: in wireless neural interfaces, there is insufficient bandwidth and power to transmit raw data. One solution is to integrate data compression into recorders thus reducing the wireless data rate. However, conventional compression techniques are computationally demanding, requiring too much silicon area for implementation.
Compressive sensing: compressive sensing (CS) is an emerging strategy for non-adaptive, sub-Nyquist sampling of sparse signals. CS has been used to design sub-Nyquist analog front-end and digital source encoders in neural recording systems. The current CS encoders rely on random measurement matrices, which require a parallel processing architecture that is not suitable for hardware implementation.
Our work: in our recent research, we have developed a novel CS encoder by incorporating deterministic measurement matrix, namely Quasi-Cyclic Array Code (QCAC) based matrix. The QCAC-based matrix exhibits highly structured data pattern, which yields to both area- and energy- efficient CS encoder architecture.
This project: in this project, we will implement the QCAC-CS encoder in an advanced CMOS technology for neural data compression.